Are there architectures that don't use two additions to represent negative values?

Question

The benefits of using two add-ons to store negative values ​​in memory are well known and well discussed on this board.

Therefore, I am wondering:

Are there or are some architectures that have chosen a different way of representing negative values ​​in memory than using two additions? If yes: what were the reasons?

Answer 1

The signed quantity existed as the most obvious naive realization of the signed numbers.

One instance was also used on real machines.

In both of these views, there is the advantage that the positive and negative ranges span equal intervals. The disadvantage is that they both contain a negative zero representation, which, of course, does not occur in the form of integer arithmetic, usually used in the calculation. And, of course, the hardware for the two components is much easier to build.

Please note that this applies to integers. IEEE-style generic floating-point representations represent a significant sign magnitude, and some details are nested in the magnitude representation.