To be clear, there is no working response from lzcnt to bsr . It so happened that Intel used the previously redundant rep bsr to encode the new lzcnt instruction. The use of the redudant rep prefix for bsr usually defined as ignored, but with the caveat that it can decode differently on future processors 1 .
So, if you run lzcnt on a CPU that does not support it, it will execute as bsr . Of course, this reserve is not exactly deliberate, and it gives the wrong result (as Paul R. points out, they look at the same bit, but report it differently): this is simply a consequence of how the new instruction was encoded and how pointless rep prefixes were handled by previous processors. Thus, the world reserve is practically not suitable for lzcnt and bsr .
The situation is more subtle for tzcnt and bsf . It uses the same encoding trick: tzcnt has the same encoding as rep bsf , but here the “fallback” basically works, since tzcnt returns the same value as bsf for all inputs except zero. For null inputs, tzcnt returns 32, but bsf leaves destination undefined.
You can't even use this reserve: if you never had zero inputs, you could just use bsf , saving bytes and being compatible with several decades of processors, and if you have zero inputs the behavior is different.
Thus, behavior may be better classified as little things than a reserve ...
1 Usually this would be more or less esoteric, but you could, for example, use rep prefixes, where they have no functional effect to extend instructions to help align subsequent code without inserting an explicit nop instruction. Given that "it may be differently decoded in the future," this would be dangerous when compiling code that could run on any future processor.