Here is the problem I'm working on
Problem: A high-speed workstation has 64-bit words and 64-bit addresses with address resolution at the byte level. How many words can be in the address space of a workstation?
I defined the various members in the task
- Word Size - The natural processor block of data. The size of a word determines the amount of information that can be processed at a time.
- Byte Level Addressing - Hardware architectures that support access to individual bytes in a word
- 64-bit addressing - You have 64 bits to indicate an address in Runtime memory that contains instructions or data
- Address space - Launch programmatic representation of memory in the system
How could you use all of these definitions to solve this problem?
From 64 bits I know that technically there are 2 ^ 64 places in memory and from 64-bit words that the processor processes 8 bytes. But I do not know how to use this information to conclude how many words are in the address space of a computer.
64bit cpu memory-address computer-architecture processor
committedandroider May 31 '15 at 1:26 2015-05-31 01:26
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