PAE on x86-64 bit processors - Linux kernel

Question

I noticed that the PAE bit in the CR4 register is enabled on my Linux (3.19) x86-64 machine. The PAE function allows you to access physical addresses up to 64 GB, but I do not understand why this is necessary when long-mode is enabled. I searched for it for a while, but did not find a satisfactory answer.

Any suggestions?

Answer 1

Used paging IA-32e.

The logic processor uses IA-32e paging if CR0.PG = 1, CR4.PAE = 1 and IA32_EFER.LME = 1.
Using the IA-32e paging, the linear address is mapped using a hierarchy of paging structures in memory located using CR3 content .
Swap IA-32e translates 48-bit linear addresses to 52-bit physical addresses.
Although 52 bits correspond to 4 PBytes, linear addresses are limited to 48 bits; no more than 256 terabytes of linear address space can be accessed at any given time.

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Processors

x86 supports three swap modes:

• 32-bit paging (CR0.PG = 1 and CR4.PAE = 0)
• PAE paging (CR0.PG = 1, CR4.PAE = 1 and IA32_EFER.LME = 0)
• IA-32e paging (CR0.PG = 1, CR4.PAE = 1 and IA32_EFER.LME = 1)

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